Traditionally, scan diagnosis is used to determine the most likely faulty locations and fault types for a given failing integrated circuit device. The diagnosis results guide physical failure analysis (PFA) to locate defects and identify the root cause. Defects are typically classified into two categories based on defect locations. A defect in a library cell is called a cell internal defect, and a defect on interconnecting wires is called an interconnect defect. Various fault models are developed to address different fault effects and layout information is incorporated into the diagnosis process. The improved diagnosis accuracy and resolution enable failure analysis engineers to focus on smaller areas. This leads to higher PFA success rates and lower turnaround time and costs. Scan diagnosis has also been applied directly to yield analysis. Based on analyzing volume diagnosis results, systematic yield limiters can be identified. Despite these developments, conventional diagnosis techniques can still miss some defects such as bridge defects located between neighboring cells or generate too many cell suspects for the observed failing test responses. New diagnosis techniques that can address inter-cell bridge defects effectively and efficiently are needed.